The invention relates generally to a bus structure.
Connecting a set of subsystems or logic blocks through a shared bus is a significant problem in designing integrated circuits. Conventional bus structures include a tri-state bus and a multiplexed bus.
A tri-state bus has a bus wire that is driven by one of several tri-state drivers, which, when enabled, actively drives the bus wire with the value of a data signal. All devices with a tri-state driver can receive the current from the bus wire.
However, this conventional approach has several disadvantages. Only one tri-state driver can be enabled at a time. If multiple drivers are simultaneously enabled, there can be significant leakage current which causes improper operation of the bus and may permanently damage the integrated circuit. If no driver is enabled, the voltage level of the bus will float. Unless additional circuitry is provided to prevent the floating voltage level, at least one driver must be enabled to drive the bus.
The difficulty of keeping one driver enabled while preventing multiple drivers from being enabled is a significant disadvantage of the tri-state approach. Furthermore, when the tri-state bus wire is long, the wire delay is adversely affected by the RC delay. Inserting repeaters into the tri-state bus wire is difficult, because the tri-state bus wire is bi-directional. This also adversely affects the performance of the bus.
Another conventional approach uses a multiplexed bus. The multiplexed bus has a large number of bus wires. Multiple drivers are attached to the multiple bus wires, so that every driver is connected to every other driver. Each driver performs a multiplex function to receive data from other drivers through several of the multiple bus wires.
This multiplexed approach has several disadvantages. The multiplexed approach is very expensive because of the large number of bus wires that are used. Also, the probability of routing congestion with the multiplexed bus is very high. Furthermore, inserting repeaters into the multiplexed bus is very complicated, unpredictable, and expensive, due to the large number of bus wires used. For example, as the number of devices attached to the bus increases, the number wires increases quadratically, and the number of repeaters increases as the number and length of wires increases.
An apparatus having a first and second bus is disclosed. A plurality of units are coupled to the first and second buses. The units include a middle unit and at least two side units. Each side unit has a first bus output coupled to a first bus input of the middle unit. The middle unit has a second bus output coupled to a second bus input of each side unit.